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module final ( CLOCK_50, CLOCK_50_2, ORG_BUTTON, SW, HEX0_D, HEX0_DP, HEX1_D, HEX1_DP, HEX2_D, HEX2_DP, HEX3_D, HEX3_DP, LEDG, UART_TXD, UART_RXD, UART_CTS, UART_RTS, DRAM_DQ, DRAM_ADDR, DRAM_LDQM, DRAM_UDQM, DRAM_WE_N, DRAM_CAS_N, DRAM_RAS_N, DRAM_CS_N, DRAM_BA_0, DRAM_BA_1, DRAM_CLK, DRAM_CKE, FL_DQ, FL_DQ15_AM1, FL_ADDR, FL_WE_N, FL_RST_N, FL_OE_N, FL_CE_N, FL_WP_N, FL_BYTE_N, FL_RY, LCD_BLON, LCD_RW, LCD_EN, LCD_RS, LCD_DATA, SD_DAT0, SD_DAT3, SD_CMD, SD_CLK, SD_WP_N, PS2_KBDAT, PS2_KBCLK, PS2_MSDAT, PS2_MSCLK, VGA_HS, VGA_VS, VGA_R, VGA_G, VGA_B, GPIO0_CLKIN, GPIO0_CLKOUT, GPIO0_D, GPIO1_CLKIN, GPIO1_CLKOUT, GPIO1_D ); input CLOCK_50; input CLOCK_50_2; input [2:0] ORG_BUTTON; input [9:0] SW; output [6:0] HEX0_D; output HEX0_DP; output [6:0] HEX1_D; output HEX1_DP; output [6:0] HEX2_D; output HEX2_DP; output [6:0] HEX3_D; output HEX3_DP; output [9:0] LEDG; output UART_TXD; input UART_RXD; output UART_CTS; input UART_RTS; inout [15:0] DRAM_DQ; output [12:0] DRAM_ADDR; output DRAM_LDQM; output DRAM_UDQM; output DRAM_WE_N; output DRAM_CAS_N; output DRAM_RAS_N; output DRAM_CS_N; output DRAM_BA_0; output DRAM_BA_1; output DRAM_CLK; output DRAM_CKE; inout [14:0] FL_DQ; inout FL_DQ15_AM1; output [21:0] FL_ADDR; output FL_WE_N; output FL_RST_N; output FL_OE_N; output FL_CE_N; output FL_WP_N; output FL_BYTE_N; input FL_RY; inout [7:0] LCD_DATA; output LCD_BLON; output LCD_RW; output LCD_EN; output LCD_RS; inout SD_DAT0; inout SD_DAT3; inout SD_CMD; output SD_CLK; input SD_WP_N; inout PS2_KBDAT; inout PS2_KBCLK; inout PS2_MSDAT; inout PS2_MSCLK; output VGA_HS; output VGA_VS; output [3:0] VGA_R; output [3:0] VGA_G; output [3:0] VGA_B; input [1:0] GPIO0_CLKIN; output [1:0] GPIO0_CLKOUT; inout [31:0] GPIO0_D; input [1:0] GPIO1_CLKIN; output [1:0] GPIO1_CLKOUT; inout [31:0] GPIO1_D; parameter H_FRONT = 16; parameter H_SYNC = 96; parameter H_BACK = 48; parameter H_ACT = 640; parameter H_BLANK = H_FRONT + H_SYNC + H_BACK; parameter H_TOTAL = H_FRONT + H_SYNC + H_BACK + H_ACT;
parameter V_FRONT = 11; parameter V_SYNC = 2; parameter V_BACK = 32; parameter V_ACT = 480; parameter V_BLANK = V_FRONT + V_SYNC + V_BACK; parameter V_TOTAL = V_FRONT + V_SYNC + V_BACK + V_ACT;
wire CLK_25; wire CLK_to_DAC; wire RST_N; divn # (.WIDTH(26), .N(2)) u0 ( .clk(CLOCK_50), .rst_n(SW[0]), .o_clk(CLK_25) );
assign CLK_to_DAC = CLK_25; assign VGA_SYNC = 1'b0; assign VGA_BLANK = ~((H_Cont<H_BLANK)||(V_Cont<V_BLANK)); assign VGA_CLK = ~CLK_to_DAC; assign RST_N = SW[0]; wire BT[0:2]; assign BT[0] = ORG_BUTTON[0]; assign BT[1] = ORG_BUTTON[1]; assign BT[2] = ORG_BUTTON[2];
reg [10:0] H_Cont; reg [10:0] V_Cont; reg [9:0] vga_r; reg [9:0] vga_g; reg [9:0] vga_b; reg vga_hs; reg vga_vs; reg [10:0] X; reg [10:0] Y;
assign VGA_R = vga_r; assign VGA_G = vga_g; assign VGA_B = vga_b; assign VGA_HS = vga_hs; assign VGA_VS = vga_vs;
always@(posedge CLK_to_DAC, negedge RST_N) begin if(!RST_N) begin H_Cont <= 0; vga_hs <= 1; X <= 0; end else begin if (H_Cont < H_TOTAL) H_Cont <= H_Cont+1'b1; else H_Cont <= 0; if(H_Cont == H_FRONT-1) vga_hs <= 1'b0; if(H_Cont == H_FRONT + H_SYNC -1) vga_hs <= 1'b1;
if(H_Cont >= H_BLANK) X <= H_Cont-H_BLANK; else X <= 0; end end
always@(posedge VGA_HS, negedge RST_N) begin if(!RST_N) begin V_Cont <= 0; vga_vs <= 1; Y <= 0; end else begin if (V_Cont<V_TOTAL) V_Cont <= V_Cont + 1'b1; else V_Cont <= 0; if (V_Cont == V_FRONT-1) vga_vs <= 1'b0; if (V_Cont == V_FRONT + V_SYNC-1) vga_vs <= 1'b1; if (V_Cont >= V_BLANK) Y <= V_Cont-V_BLANK; else Y <= 0; end end
integer s10 = 250000000; integer s1 = 25000000; integer s0 = 3750000; integer ms1 = 25000; integer clock = 0;
integer dir = 3; integer gamelock = 0; integer headx, heady; integer long = 1; integer apple1x, apple1y; integer apple2x, apple2y; integer apple3x, apple3y; integer a1 =1 ; integer a2 =1 ; integer a3 =1 ; always@(posedge CLK_to_DAC, negedge RST_N) begin if(!RST_N) begin gamelock = 0; dir = 3; headx = 340; heady = 240; apple1x = 100; apple1y = 120; apple2x = 360; apple2y = 180; apple3x = 240; apple3y = 420; a1 = 1; a2 = 1; a3 = 1; clock = 0; vga_r <= 0; vga_g <= 0; vga_b <= 0; end else begin if(gamelock == 1) begin clock = clock + 1; if(clock % s1 == 0) begin clock = 0; end if(clock % (100*ms1) == 0) begin if(headx >= 591 || headx <= 80 || heady <= 40 || heady >= 431) begin gamelock = 2; end else if (a1 == 0 && a2 == 0 && a3 == 0) begin gamelock = 3; end end if(clock % s0 == 0) begin if (!BT[2]) begin dir = dir - 1; if (dir < 0) begin dir = dir + 4; end end else if (!BT[0]) begin dir = dir + 1; if (dir > 3) begin dir = dir - 4; end end if (dir == 0) begin heady = heady - 10; end else if (dir == 1) begin headx = headx + 10; end else if (dir == 2) begin heady = heady + 10; end else if (dir == 3) begin headx = headx - 10; end if(headx == apple1x && heady == apple1y) begin a1 = 0; end if(headx == apple3x && heady == apple3y) begin a3 = 0; end if(headx == apple2x && heady == apple2y) begin a2 = 0; end end end vga_g <= ( X <= headx+10 && X >= headx && Y >= heady && Y <= heady+10 ) ? 1023 : 128; vga_b <= ( Y >= 1 && Y <= 40 && X <= 640 && X >= 41) ? 1023 : ( Y >= 441 && Y <= 480 && X <= 640 && X >= 41) ? 1023 : ( X <= 640 && X >= 601) ? 1023 : ( X <= 80 && X >= 41) ? 1023 : 128; vga_r <= ( a1 == 1 && X >= 101 && X <= 110 && Y >= 121 && Y <= 130)? 1023: ( a2 == 1 && X >= 361 && X <= 370 && Y >= 181 && Y <= 190)? 1023: ( a3 == 1 && X >= 241 && X <= 250 && Y >= 421 && Y <= 430)? 1023: 128; if(gamelock == 0) begin if(!BT[1]) begin gamelock = 1; end end if(gamelock == 2) begin vga_r <= (X >= 226 && X <= 235 && Y >= 101 && Y <= 150) ? 1023: (X >= 226 && X <= 275 && Y >= 141 && Y <= 150) ? 1023: (X >= 286 && X <= 335 && Y >= 101 && Y <= 110) ? 1023: (X >= 286 && X <= 335 && Y >= 141 && Y <= 150) ? 1023: (X >= 286 && X <= 295 && Y >= 101 && Y <= 150) ? 1023: (X >= 326 && X <= 335 && Y >= 101 && Y <= 150) ? 1023: (X >= 346 && X <= 395 && Y >= 101 && Y <= 110) ? 1023: (X >= 346 && X <= 395 && Y >= 121 && Y <= 130) ? 1023: (X >= 346 && X <= 395 && Y >= 141 && Y <= 150) ? 1023: (X >= 346 && X <= 355 && Y >= 111 && Y <= 120) ? 1023: (X >= 386 && X <= 395 && Y >= 131 && Y <= 140) ? 1023: (X >= 406 && X <= 455 && Y >= 101 && Y <= 110) ? 1023: (X >= 406 && X <= 455 && Y >= 121 && Y <= 130) ? 1023: (X >= 406 && X <= 455 && Y >= 141 && Y <= 150) ? 1023: (X >= 406 && X <= 415 && Y >= 101 && Y <= 150) ? 1023: 128; if(!BT[1]) begin gamelock = 1; end end if (gamelock == 3)begin vga_r <= (X >= 256 && X <= 305 && Y >= 101 && Y <= 110) ? 1023: (X >= 256 && X <= 305 && Y >= 121 && Y <= 130) ? 1023: (X >= 256 && X <= 305 && Y >= 141 && Y <= 150) ? 1023: (X >= 256 && X <= 265 && Y >= 101 && Y <= 150) ? 1023: (X >= 316 && X <= 325 && Y >= 101 && Y <= 150) ? 1023: (X >= 356 && X <= 365 && Y >= 101 && Y <= 150) ? 1023: (X >= 326 && X <= 335 && Y >= 101 && Y <= 120) ? 1023: (X >= 346 && X <= 355 && Y >= 131 && Y <= 150) ? 1023: (X >= 336 && X <= 345 && Y >= 121 && Y <= 130) ? 1023: (X >= 376 && X <= 385 && Y >= 101 && Y <= 150) ? 1023: (X >= 386 && X <= 405 && Y >= 101 && Y <= 110) ? 1023: (X >= 386 && X <= 405 && Y >= 141 && Y <= 150) ? 1023: (X >= 406 && X <= 415 && Y >= 111 && Y <= 120) ? 1023: (X >= 416 && X <= 425 && Y >= 121 && Y <= 130) ? 1023: (X >= 406 && X <= 415 && Y >= 131 && Y <= 140) ? 1023: 128; if(!BT[1]) begin gamelock = 1; end end end end
endmodule
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